forked from 1b-agent/opencadstudio-upstream
refactor(viewport): unify content-viewport clipping on the stencil path
Rectangular paper viewports now go through the same GPU stencil clip as non-rectangular ones: viewport_clip_boundary_ndc returns the four rect corners (a full-target mask) instead of nothing, so the render path has no rect/non-rect special case — every content viewport carries a clip boundary and draws with stencil reference 0xFF. With a single clip path, the old per-wire / -image / -wipeout scissor mechanism is fully dead and removed: compute_*_scissors, the *_pixel_scissors buffers, the project_scissor helper, the per-pass set_scissor_rect blocks, the vp_scissor field threaded through WireModel / ImageModel / HatchModel and their GPU mirrors (WireGpu / ImageGpu / WipeoutGpu / HatchWebGpu), from_run's scissor parameter, the scissor grouping in build_wire_buffers, and the is_arena_eligible gate. Net -245 lines across 54 files. Rectangular viewports still clip exactly via their own render rectangle; the stencil mask is a redundant full-target no-op there, kept only so the clip code path stays uniform. XCLIP keeps its CPU wire clip. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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@@ -84,12 +84,6 @@ pub struct HatchModel {
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pub angle_offset: f32,
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/// Pattern scale multiplier (from DXF `pattern_scale`).
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pub scale: f32,
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/// Optional world-space XY rect [x0, y0, x1, y1] for paper-space
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/// viewport clipping. When `Some`, the pipeline translates it into
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/// a per-frame pixel scissor and clips this hatch's draw call to it,
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/// preventing viewport-projected content from bleeding past the
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/// viewport frame. Mirrors `WireModel.vp_scissor`.
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pub vp_scissor: Option<[f32; 4]>,
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/// Normalized draw-order depth in (0,1); higher draws on top. Fed to the
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/// hatch pipeline as a small clip-z bias so this fill orders correctly
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/// against other entity types. 0.0 for transient/preview hatches.
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@@ -100,10 +100,6 @@ pub struct ImageModel {
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/// Low residual paired with `corners` (double-single) so the GPU keeps
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/// sub-unit precision at UTM-scale insertion points.
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pub corners_low: [[f32; 3]; 4],
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/// Optional world-space XY rect [x0, y0, x1, y1] for paper-space
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/// viewport clipping. Mirrors `WireModel.vp_scissor` /
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/// `HatchModel.vp_scissor`.
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pub vp_scissor: Option<[f32; 4]>,
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/// Normalized draw-order depth in (0,1); higher draws on top. Fed to the
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/// image pipeline as a small clip-z bias so the raster orders correctly
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/// against other entity types.
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@@ -179,7 +175,6 @@ impl ImageModel {
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opacity,
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corners,
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corners_low,
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vp_scissor: None,
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draw_depth: 0.0,
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verts,
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})
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@@ -234,7 +229,6 @@ impl ImageModel {
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opacity: 1.0,
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corners,
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corners_low,
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vp_scissor: None,
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draw_depth: 0.0,
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verts,
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})
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@@ -86,9 +86,6 @@ pub struct WireModel {
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/// share one interior phase (perpendicular dashes line up) yet each still
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/// ends on a dash. `None` (the default) = per-wire A-type / from-start.
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pub dash_align_end: Option<f32>,
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/// Paper-space bounding box [x0, y0, x1, y1] for GPU scissor clipping.
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/// Set only for viewport-projected wires in paper-space layouts.
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pub vp_scissor: Option<[f32; 4]>,
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/// Pre-triangulated solid fill: flat vertex list, 3 per triangle (world-offset applied).
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/// Non-empty only for PolyfaceMesh / PolygonMesh entities.
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pub fill_tris: Vec<[f32; 3]>,
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@@ -196,7 +193,6 @@ impl WireModel {
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plinegen: true,
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dash_from_start: false,
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dash_align_end: None,
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vp_scissor: None,
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fill_tris: vec![],
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fill_tris_low: Vec::new(),
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}
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@@ -406,7 +402,6 @@ impl Default for WireModel {
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plinegen: true,
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dash_from_start: false,
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dash_align_end: None,
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vp_scissor: None,
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fill_tris: Vec::new(),
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fill_tris_low: Vec::new(),
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fill_is_3d: false,
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