Commit Graph
6 Commits
Author SHA1 Message Date
Christopher Overbeck e52e565b1f fix(renderer): keep draw-order offsets within clipping planes 2026-09-15 12:36:05 -05:00
Hakan Seven d07e8cf7d4 Fix wipeout rotation and block frame width 2026-09-11 20:38:00 +03:00
Karim Jerbi 0ad31ece6f fix(render): correct polyline segment widths, flat arc end caps, and zero-width endpoints 2026-09-10 12:43:25 +01:00
Karim Jerbi ed177cbf25 Host wide polyline quads on their 3D plane instead of billboarding in screen space 2026-09-09 14:23:10 +01:00
Karim Jerbi 76e1610dcc fix(render): render wide polyline segments as flat 2D rectangles instead of rounded pill shapes 2026-09-09 13:44:57 +01:00
PanosandClaude Opus 5 6599b82776 perf: store block-wire segments once instead of six times
The layout-switch OOM names its buffer: `Buffer with 'block_wire.vertices'
label is invalid`, right after `uncaptured wgpu error #1 … Out of Memory`.
That buffer is the largest thing this renderer allocates, and five sixths
of it is duplication.

A segment reaches the shader once per corner of its quad, and the packed
path satisfies that by writing the whole 60-byte record six times —
360 bytes a segment — with `vs_main` recovering the corner from
`vertex_index % 6`. Six identical copies, on a 2 GB card.

`block_wire_storage.wgsl` puts the segments in a read-only storage buffer
indexed by `vertex_index / 6` instead, so each record is stored once. The
geometry vertex buffer disappears; the placements move to slot 0 and the
segments arrive through the definition's bind group, which becomes
per-chunk because each chunk binds its own slice.

This is the pattern `wire_indexed.wgsl` already uses for per-wire
constants, down to the capability gate: `supports_wire_storage` asks for
exactly one vertex-stage storage binding, which is exactly what this
needs. Where it is false — WebGL, the forced compatibility renderer — the
packed shader and its vertex buffer are built as before.

`Segment` is declared with scalar members rather than `vec3<f32>`, which
would align to 16 in storage and reintroduce the padding this removes. A
test validates the shader through naga and asserts the struct's stride
equals `size_of::<BlockWireVertex>()`, because a layout mismatch would
otherwise surface only as garbage geometry on a real device.

`block-wire-geometry` reports the bytes uploaded and what the packed path
would have taken, so the saving is measured rather than assumed.

The cache value becomes `Arc<Vec<BlockGeometryChunk>>` while keeping the
translation-aware key from #1006 — both modes still have to invalidate
when the base instance moves, because the records hold its world
coordinates either way. `const_bgl` and the mode are decided together
when the pipeline is built, so they travel as one `BlockWireTarget`
rather than pushing `from_wires` past the argument limit.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
2026-09-05 18:53:09 +03:00