forked from 1b-agent/opencadstudio-upstream
Hakan SevenandClaude Opus 4.8
9ca19a9db8
wasm32 has no threads, so rayon's global pool would panic at runtime. Add `crate::par::prelude`: native re-exports `rayon::prelude`, wasm provides sequential `std`-iterator equivalents (par_iter / into_par_iter / flat_map_iter over slices, Vec, HashMap, HashSet). All call sites now `use crate::par::prelude::*;` instead of rayon directly. - wire_gpu's rayon `reduce` (2-arg, no std equivalent) is cfg-split to a sequential flat_map concat on wasm. - rayon moves to a non-wasm target dependency. Native still runs in parallel; all 75 tests pass. wasm bin compiles. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
387 lines
15 KiB
Rust
387 lines
15 KiB
Rust
// Wire GPU buffers — instanced quad rendering for thick lines.
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//
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// Each segment [A→B] is one INSTANCE; the vertex shader expands a 6-vertex
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// unit quad whose corners are derived from `@builtin(vertex_index)`. This
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// cuts upload bandwidth by ~6.5× versus the old layout (which duplicated
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// the segment payload across six vertex records).
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//
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// NaN sentinel: text glyphs pack multiple disconnected strokes into one
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// WireModel, separated by [NaN, NaN, NaN] points. Segments where either
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// endpoint contains NaN are silently skipped during emission.
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//
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// Instance layout (76 bytes, stride = 76, step_mode = Instance):
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// pos_a [f32; 3] offset 0 12 B — segment start (world)
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// pos_b [f32; 3] offset 12 12 B — segment end (world)
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// color [u8; 4] offset 24 4 B — RGBA, Unorm8x4 → vec4<f32> in shader
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// distance_a f32 offset 28 4 B — arc-length at endpoint A
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// distance_b f32 offset 32 4 B — arc-length at endpoint B
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// half_width f32 offset 36 4 B — half line width in pixels
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// pattern_length f32 offset 40 4 B — dash pattern total length
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// pat0 [f32; 4] offset 44 16 B — pattern elements 0-3
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// pat1 [f32; 4] offset 60 16 B — pattern elements 4-7
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// ------
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// 76 B / instance
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use crate::scene::model::wire_model::WireModel;
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use iced::wgpu;
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use crate::par::prelude::*;
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/// Allocate a VERTEX buffer with `mapped_at_creation` and write `data` directly
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/// into the mapped slice. Skips the intermediate staging copy that
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/// `create_buffer_init` performs and avoids holding a second `Vec` worth of
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/// memory during upload — meaningful on cold open where wire buffers can run
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/// into the hundreds of MB.
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fn instance_buffer_mapped(
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device: &wgpu::Device,
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label: &str,
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data: &[WireInstance],
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) -> wgpu::Buffer {
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let bytes: &[u8] = bytemuck::cast_slice(data);
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// wgpu rejects size-0 buffers; the renderer already guards `instance_count`
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// before issuing a draw, so a placeholder allocation is fine here.
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let size = bytes.len().max(std::mem::size_of::<WireInstance>()) as u64;
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let buf = device.create_buffer(&wgpu::BufferDescriptor {
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label: Some(label),
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size,
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usage: wgpu::BufferUsages::VERTEX,
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mapped_at_creation: true,
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});
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{
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let mut view = buf.slice(..).get_mapped_range_mut();
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view[..bytes.len()].copy_from_slice(bytes);
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}
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buf.unmap();
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buf
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}
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// ── Instance layout ───────────────────────────────────────────────────────
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#[repr(C)]
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#[derive(Copy, Clone, bytemuck::Pod, bytemuck::Zeroable)]
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pub struct WireInstance {
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pub pos_a: [f32; 3],
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pub pos_b: [f32; 3],
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/// RGBA packed as `Unorm8x4` — the vertex shader receives a `vec4<f32>`
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/// in [0, 1] after the GPU does the conversion. 8 bits per channel is
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/// indistinguishable from f32 at 8-bit display output.
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pub color: [u8; 4],
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pub distance_a: f32,
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pub distance_b: f32,
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pub half_width: f32,
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pub pattern_length: f32,
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pub pat0: [f32; 4],
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pub pat1: [f32; 4],
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/// Normalized draw-order depth in (0,1); applied as a small clip-z bias
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/// in the shader so this wire orders against other entity types.
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pub draw_depth: f32,
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}
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impl WireInstance {
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pub fn layout<'a>() -> wgpu::VertexBufferLayout<'a> {
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wgpu::VertexBufferLayout {
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array_stride: std::mem::size_of::<WireInstance>() as u64,
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step_mode: wgpu::VertexStepMode::Instance,
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attributes: &[
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wgpu::VertexAttribute {
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offset: 0,
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shader_location: 0,
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format: wgpu::VertexFormat::Float32x3,
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}, // pos_a
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wgpu::VertexAttribute {
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offset: 12,
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shader_location: 1,
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format: wgpu::VertexFormat::Float32x3,
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}, // pos_b
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wgpu::VertexAttribute {
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offset: 24,
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shader_location: 2,
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format: wgpu::VertexFormat::Unorm8x4,
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}, // color
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wgpu::VertexAttribute {
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offset: 28,
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shader_location: 3,
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format: wgpu::VertexFormat::Float32,
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}, // distance_a
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wgpu::VertexAttribute {
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offset: 32,
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shader_location: 4,
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format: wgpu::VertexFormat::Float32,
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}, // distance_b
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wgpu::VertexAttribute {
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offset: 36,
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shader_location: 5,
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format: wgpu::VertexFormat::Float32,
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}, // half_width
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wgpu::VertexAttribute {
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offset: 40,
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shader_location: 6,
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format: wgpu::VertexFormat::Float32,
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}, // pattern_length
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wgpu::VertexAttribute {
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offset: 44,
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shader_location: 7,
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format: wgpu::VertexFormat::Float32x4,
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}, // pat0
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wgpu::VertexAttribute {
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offset: 60,
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shader_location: 8,
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format: wgpu::VertexFormat::Float32x4,
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}, // pat1
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wgpu::VertexAttribute {
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offset: 76,
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shader_location: 9,
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format: wgpu::VertexFormat::Float32,
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}, // draw_depth
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],
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}
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}
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}
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// ── GPU handle ────────────────────────────────────────────────────────────
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pub struct WireGpu {
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pub instance_buffer: wgpu::Buffer,
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pub instance_count: u32,
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/// Paper-space bbox [x0, y0, x1, y1] for GPU scissor clipping.
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/// Set only for viewport-projected wires; None for regular wires.
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pub vp_scissor: Option<[f32; 4]>,
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/// `true` when the source `WireModel` also carries `fill_tris`
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/// (i.e. it is a 3D mesh face — PolyfaceMesh / PolygonMesh — whose
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/// outline lives in `points`). The wire pass skips these instances
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/// in shaded modes so the surface reads as a clean solid; pure
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/// wireframe / HiddenLine / *WithEdges modes draw them.
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pub is_3d_mesh_edge: bool,
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}
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/// Expand one `WireModel` into its per-segment instance stream (1 instance per
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/// finite segment). Pulled out so both the single-wire and batched paths share
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/// the same emission logic, and so the batched path can `par_iter` across
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/// wires on cold open.
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fn pack_color(color: [f32; 4]) -> [u8; 4] {
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[
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(color[0].clamp(0.0, 1.0) * 255.0 + 0.5) as u8,
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(color[1].clamp(0.0, 1.0) * 255.0 + 0.5) as u8,
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(color[2].clamp(0.0, 1.0) * 255.0 + 0.5) as u8,
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(color[3].clamp(0.0, 1.0) * 255.0 + 0.5) as u8,
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]
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}
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fn emit_wire_instances(wire: &WireModel, color: [f32; 4], draw_depth: f32) -> Vec<WireInstance> {
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let color_u8 = pack_color(color);
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let pat0 = [
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wire.pattern[0],
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wire.pattern[1],
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wire.pattern[2],
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wire.pattern[3],
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];
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let pat1 = [
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wire.pattern[4],
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wire.pattern[5],
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wire.pattern[6],
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wire.pattern[7],
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];
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let half_width = wire.line_weight_px * 0.5;
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let n = wire.points.len();
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let seg_count = n.saturating_sub(1);
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if seg_count == 0 {
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return Vec::new();
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}
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let mut dists = vec![0.0_f32; n];
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let mut has_break = false;
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for i in 1..n {
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let p = wire.points[i - 1];
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let q = wire.points[i];
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if !p[0].is_finite() || !q[0].is_finite() {
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has_break = true;
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// plinegen=false: reset to 0 at the first real point after a NaN separator.
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dists[i] = if !wire.plinegen && !p[0].is_finite() && q[0].is_finite() {
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0.0
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} else {
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dists[i - 1]
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};
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} else {
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let dx = q[0] - p[0];
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let dy = q[1] - p[1];
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let dz = q[2] - p[2];
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dists[i] = dists[i - 1] + (dx * dx + dy * dy + dz * dz).sqrt();
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}
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}
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// Center the dash pattern on the wire instead of starting it at the first
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// vertex. The shader reads the pattern phase as `dist % pattern_length`, so
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// adding a constant offset to every arc-length shifts that phase. We place
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// the wire midpoint at the center of the first dash element, which makes the
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// line begin and end with matching partial dashes. Skipped for wires with
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// NaN breaks (per-segment dash restarts), where a single offset can't center
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// every segment.
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let pat_len = wire.pattern_length;
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if pat_len > 1e-6 && !has_break && n >= 2 {
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let total = dists[n - 1];
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if total > 1e-6 {
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// First dash element (positive), else fall back to the first element.
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let first_dash = wire
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.pattern
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.iter()
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.copied()
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.find(|&v| v > 0.0)
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.unwrap_or_else(|| wire.pattern[0].abs());
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// Phase that puts the wire midpoint at the dash center.
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let offset = first_dash * 0.5 + total * 0.5;
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for d in dists.iter_mut() {
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*d += offset;
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}
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}
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}
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let mut instances: Vec<WireInstance> = Vec::with_capacity(seg_count);
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for i in 0..seg_count {
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let a = wire.points[i];
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let b = wire.points[i + 1];
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if !a[0].is_finite()
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|| !a[1].is_finite()
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|| !a[2].is_finite()
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|| !b[0].is_finite()
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|| !b[1].is_finite()
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|| !b[2].is_finite()
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{
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continue;
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}
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instances.push(WireInstance {
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pos_a: a,
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pos_b: b,
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color: color_u8,
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distance_a: dists[i],
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distance_b: dists[i + 1],
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half_width,
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pattern_length: wire.pattern_length,
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pat0,
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pat1,
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draw_depth,
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});
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}
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instances
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}
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/// Looks up a wire's draw-order depth from the per-entity map using the
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/// handle encoded in its `name`. Falls back to 0.0 (transient / preview
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/// wires that carry no document handle).
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fn wire_draw_depth(wire: &WireModel, depth_map: &rustc_hash::FxHashMap<u64, f32>) -> f32 {
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wire
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.name
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.parse::<u64>()
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.ok()
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.and_then(|h| depth_map.get(&h).copied())
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.unwrap_or(0.0)
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}
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impl WireGpu {
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/// Merge a run of WireModels that share scissor + mesh-edge state into one
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/// (or, past the 256 MB GPU limit, a few) instance buffer(s), then stamp
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/// the shared `scissor` / `mesh_edge` onto each so the draw loop treats the
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/// whole run as a single batch.
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///
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/// Unlike [`from_batch`], instance order is **guaranteed** to follow wire
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/// order (parallel `collect` is index-ordered; the flatten is sequential).
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/// The main wire pass depends on that — depth-biased overlap *and* alpha
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/// blending both resolve in submission order, so a reorder would change the
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/// image for transparent / coincident wires.
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pub fn from_run(
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device: &wgpu::Device,
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wires: &[WireModel],
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depth_map: &rustc_hash::FxHashMap<u64, f32>,
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scissor: Option<[f32; 4]>,
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mesh_edge: bool,
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) -> Vec<Self> {
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use crate::par::prelude::*;
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const MAX_INSTANCES: usize = 268_435_456 / std::mem::size_of::<WireInstance>();
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let per: Vec<Vec<WireInstance>> = wires
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.par_iter()
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.map(|w| emit_wire_instances(w, w.color, wire_draw_depth(w, depth_map)))
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.collect();
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let mut instances: Vec<WireInstance> = Vec::with_capacity(per.iter().map(Vec::len).sum());
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for mut v in per {
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instances.append(&mut v);
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}
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if instances.is_empty() {
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return vec![];
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}
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instances
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.chunks(MAX_INSTANCES)
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.map(|chunk| {
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let buf = instance_buffer_mapped(device, "wire.run.ibuf", chunk);
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Self {
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instance_buffer: buf,
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instance_count: chunk.len() as u32,
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vp_scissor: scissor,
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is_3d_mesh_edge: mesh_edge,
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}
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})
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.collect()
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}
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/// Merge multiple WireModels into GPU instance buffers, chunked to fit the
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/// 256 MB GPU limit. Each wire keeps its own color and pattern — they live
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/// per-instance.
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pub fn from_batch(
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device: &wgpu::Device,
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wires: &[WireModel],
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depth_map: &rustc_hash::FxHashMap<u64, f32>,
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) -> Vec<Self> {
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let total_segs: usize = wires.iter().map(|w| w.points.len().saturating_sub(1)).sum();
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if total_segs == 0 {
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return vec![];
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}
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// Parallel per-wire instance emission. Each wire's stream is
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// independent — `block_cache` groups wires by style upstream, so order
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// within a batch does not affect correctness. `reduce` concatenates the
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// per-wire Vec<WireInstance> chunks while letting rayon spread work
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// across cores.
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#[cfg(not(target_arch = "wasm32"))]
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let instances: Vec<WireInstance> = wires
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.par_iter()
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.map(|wire| emit_wire_instances(wire, wire.color, wire_draw_depth(wire, depth_map)))
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.reduce(Vec::new, |mut acc, mut chunk| {
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if acc.is_empty() {
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chunk
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} else if chunk.is_empty() {
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acc
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} else {
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acc.append(&mut chunk);
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acc
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}
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});
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// Web: no thread pool — concatenate the per-wire streams sequentially.
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#[cfg(target_arch = "wasm32")]
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let instances: Vec<WireInstance> = wires
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.iter()
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.flat_map(|wire| emit_wire_instances(wire, wire.color, wire_draw_depth(wire, depth_map)))
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.collect();
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if instances.is_empty() {
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return vec![];
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}
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// GPU max buffer size is 256 MB; chunk to stay within the limit.
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const MAX_INSTANCES: usize = 268_435_456 / std::mem::size_of::<WireInstance>();
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instances
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.chunks(MAX_INSTANCES)
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.enumerate()
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.map(|(i, chunk)| {
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let label = format!("wire.batch.ibuf.{i}");
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let instance_buffer = instance_buffer_mapped(device, &label, chunk);
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Self {
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instance_buffer,
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instance_count: chunk.len() as u32,
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vp_scissor: None,
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is_3d_mesh_edge: false,
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}
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})
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.collect()
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}
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}
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